[1]
A. Jaberi Rad, K. Kumar, F. Kiani, Y. Huang, A. Abdel‐Maksoud, Z. Xiong, Y. Ling, W. Zhao, and Q. Xia, “Single‐step analog in‐memory matrix computation in three‐dimensional circuits,” Advanced Intelligent Systems, 2026, doi: 10.1002/aisy.70500
[2]
Y. Huang, A. J. Rad, D. Belkin, N. Ge, J. Joshua Yang, M. Hu, and Q. Xia, “Hyperdimensional in-memory computing with analogue memristive crossbar arrays,” Nature Communications, 2026, doi: 10.1038/s41467-026-76067-5
[3]
R. Li, C. He, Y. Huang, E. Zhai, V. K. Sangwan, J. Zou, K. St. Luce, J. Cui, R. Kim, R. Liu, Z. Wang, X. Ling, H. Xie, X. Zhang, M. C. Hersam, Q. Xia, L. Katehi, and Y. C. Lin, “Electrochromic hyperspectral embedding for ultracompact intelligent vision,” Nature Sensors, May 2026, doi: 10.1038/s44460-026-00065-9
[4]
V. Ravichandran, Y. Huang, B. Flannery, T. Molom-Ochir, T. Maurer, S. Asapu, A. Abdel-Maksoud, N. Heermance, R. Yoo, J. Tackie, W. Zhao, Y. Ling, A. Guo, J. J. Yang, and Q. Xia, “Memristive cellular neural networks for fast in-pixel computing,” Nature Electronics, vol. 9, pp. 189–199, Jan. 2026, doi: 10.1038/s41928-025-01555-3
[5]
W. Zhao, Y. Huang, A. Tewari, A. J. Rad, A. Zhang, N. Ge, J. J. Yang, M. Hu, S. Majumdar, and Q. Xia, “Event-based neuromorphic sensing system with flexible haptic sensors and a memristive system on a chip,” Nature Sensors, vol. 1, pp. 163–171, Jan. 2026, doi: 10.1038/s44460-025-00013-z
[6]
Y. Huang, C. He, Y. Ling, N. Ge, J. J. Yang, M. Hu, L. Katehi, and Q. Xia, “Radiofrequency signal processing with a memristive system-on-a-chip,” Nature Electronics, vol. 8, pp. 587–596, July 2025, doi: 10.1038/s41928-025-01409-y
[7]
N. Jiang, M. Jiang, H. Huang, L. Yang, Y. Huang, and Z. Zeng, “A parallel read-write circuit with fast amplitude-adaptive matching scheme to memristor crossbar array,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 72, pp. 5898–5911, Oct. 2025, doi: 10.1109/TCSI.2025.3544554
[8]
Y. Huang, T. Ando, A. Sebastian, M.-F. Chang, J. J. Yang, and Q. Xia, “Memristor-based hardware accelerators for artificial intelligence,” Nature Reviews Electrical Engineering, vol. 1, pp. 286–299, Apr. 2024, doi: 10.1038/s44287-024-00037-6
[9]
F. Nowshin, Y. Huang, Md. R. Sarkar, Q. Xia, and Y. Yi, “MERRC: A memristor-enabled reconfigurable low-power reservoir computing architecture at the edge,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 71, pp. 174–186, Jan. 2024, doi: 10.1109/TCSI.2023.3329337
[10]
Y. Huang, A. J. Rad, and Q. Xia, “Hardware-algorithm co-design for hyperdimensional computing based on memristive system-on-chip,” in NeurIPS 2024 workshop on machine learning with new compute paradigms, 2024,
[11]
Y. Huang, F. Kiani, F. Ye, and Q. Xia, “From memristive devices to neuromorphic systems,” Applied Physics Letters, vol. 122, pp. 110501, Mar. 2023, doi: 10.1063/5.0133044
[12]
Y. Huang, V. Ravichandran, W. Zhao, and Q. Xia, “Towards energy-efficient computing hardware based on memristive nanodevices,” IEEE Nanotechnology Magazine, vol. 17, pp. 30–38, Oct. 2023, doi: 10.1109/MNANO.2023.3297106
[13]
F. Ye, F. Kiani, Y. Huang, and Q. Xia, “Diffusive memristors with uniform and tunable relaxation time for spike generation in event‐based pattern recognition,” Advanced Materials, vol. 35, pp. 2204778, Sept. 2023, doi: 10.1002/adma.202204778
[14]
X. Liu, Y. Huang, Z. Zeng, and D. C. Wunsch, “Memristor-based HTM spatial pooler with on-device learning for pattern recognition,” IEEE Transactions on Systems, Man, and Cybernetics: Systems, vol. 52, pp. 1901–1915, Mar. 2022, doi: 10.1109/TSMC.2020.3035612
[15]
L. Yang, Z. Zeng, and Y. Huang, “An associative-memory-based reconfigurable memristive neuromorphic system with synchronous weight training,” IEEE Transactions on Cognitive and Developmental Systems, vol. 12, pp. 529–540, Sept. 2020, doi: 10.1109/TCDS.2019.2932179
[16]
X. Shi, Z. Zeng, L. L. Yang, and Y. Huang, “Memristor-based circuit design for neuron with homeostatic plasticity,” IEEE Transactions on Emerging Topics in Computational Intelligence, vol. 2, pp. 359–370, Oct. 2018, doi: 10.1109/TETCI.2018.2829914
[17]
L. Yang, Z. Zeng, Y. Huang, and S. Wen, “Memristor-based circuit implementations of recognition network and recall network with forgetting stages,” IEEE Transactions on Cognitive and Developmental Systems, vol. 10, pp. 1133–1142, Dec. 2018, doi: 10.1109/TCDS.2018.2859303
[18]
Y. Huang, R. Hu, and Z. Zeng, “Three-dimensional memristor-based crossbar architecture for capsule network implementation,” in 2018 eighth international conference on information science and technology (ICIST), pp. 170–175, June 2018, doi: 10.1109/ICIST.2018.8426119